CARG

Princeton Computer Architecture Reading Group

CArch • Reading Group

CArch is an interdisciplinary computer
architecture reading group formed by students from the Departments
of Electrical Engineering and Computer Science at Princeton University.

Publications

Here is a list of papers that are published by members of CArch (in bold).

2008

S. Isaacman and M. Martonosi. "Potential for Collaborative Caching and Prefetching in Largely-Disconnected Villages." Wireless Networks and Systems for Developing Regions Workshop. 2008

E. Raman, G. Ottoni, A. Raman, M. Bridges, and D. I. August , “Parallel-Stage Decoupled Software Pipelining,” Proceedings of the 2008 International Symposium on Code Generation and Optimization (CGO), April 2008.

Abhishek Bhattacharjee, Gilberto Contreras, Margaret Martonosi, “Full-System Chip Multiprocessor Power Evaluations Using FPGA-Based Emulation”, International Symposium on Low Power Electronics and Design (ISLPED), August 2008

Vincent Lenders, Emmanouil Koukoumidis, Pei Zhang, Margaret Martonosi. "ocation-based Trust for Mobile User-generated Content: Applications, Challenges and Implementations". The 9th IEEE Workshop on Mobile Computing Systems and Applications(HotMobile 2008), February 2008.

Carole-Jean Wu, Margaret Martonosi. "A Comparison of Capacity Management Schemes for Shared CMP Caches". 7th Annual Workshop on Duplicating, Deconstructing, and Debunking (WDDD) in conjunction with ISCA-35, June 2008.

Bin Li; Li-Shiuan Peh; Patra, P., "Impact of Process and Temperature Variations on Network-on-Chip Design Exploration," Networks-on-Chip, 2008. NoCS 2008. Second ACM/IEEE International Symposium on , vol., no., pp.117-126, 7-10 April 2008

2007

A. Muttreja, N. Agarwal, N. Jha, "CMOS Logic Design with Independent-gate FinFETs,", International Conference on Computer Design, 2007.

S. Dey, M. Kedia, N. Agarwal, A. Basu, "Embedded Support Vector Machine : Architectural Enhancements and Evaluation," International Conference of VLSI Design, 2007

Bridges, M., Vachharajani, N., Zhang, Y., Jablin, T., and August, D. 2007. Revisiting the Sequential Programming Model for Multi-Core. In Proceedings of the 40th Annual IEEE/ACM international Symposium on Microarchitecture (December 01 - 05, 2007). International Symposium on Microarchitecture.

2006

D. L. Rubin, S. Isaacman, and A. Long, "Modeling Colliding Beams with an Element by Element Representation of the Storage Ring Guide Field, , Phys. Rev. ST Accel. Beams 9 (1).

G. Keramidas, K. Aisopos, and S. Kaxiras, “Dynamic Dictionary-Based Data Compression for Level-1 Caches,” 19th International Conference on Architecture of Computing Systems (ARCS '06).

K. Emmanouil, and E. Ilias, “T4 Wobbling – Solving the puzzle” ”, CERN, August 2005.

K. Aisopos, A. P. Kakarountas, H. Michail, and C. E. Goutis, “High Throughput Implementation of the New Secure Hash Algorithm through Partial Unrolling,” IEEE 2005 Workshop on Signal Processing Systems (SIPS '05).